Nuvotronics, Inc.

PolyStrata SMT Assembly Guide

Purpose

This document provides an overview of recommended SMT process guidelines for PolyStrata surface mount components. Note that these are intended only as guidelines and not a mandatory ruleset. Designers should always work in tandem with the final assembler/manufacturer to ensure a robust SMT process.

Table of Contents

  1. Stencil Design
  2. Paste Type
  3. Reflow Profiles
  4. Pick and Place
  5. Footprint
  6. Examples

Stencil Design

To ensure proper paste is applied to the PCB, the correct stencil sizing must be used. IPC‑7525C outlines stencil design guidelines and should always be followed for a repeatable manufacturing process. Two important parameters to consider are the stencil thickness and coating.

Figure 1 — IPC Stencil Sizing Guidelines</p> <p>This calculation is critical for repeatable solderability. Aspect and area ratios should be kept to at least 1.5 and 0.66 respectively — this ensures proper release of the solder paste from the stencil without under‑pasting the part.
Figure 1 — IPC Stencil Sizing Guidelines 

The calculation outlined in Figure 1 is critical for repeatable solderability. Aspect and area ratios should be kept to at least 1.5 and 0.66 respectively. This will ensure proper release of the solder paste release from the stencil without under pasting the part.

Example Calculation

Below is an example calculation of the stencil thickness using the recommended paste pattern from a PolyStrata RF launch:

Figure 2 — Launch Pin Geometry
Figure 2 — Launch Pin Geometry
𝐴𝑠𝑝𝑒𝑐𝑡 𝑅𝑎𝑡𝑖𝑜 = 𝑊𝑖𝑑𝑡ℎ 𝑇ℎ𝑖𝑐𝑘𝑛𝑒𝑠𝑠 0.291𝑚𝑚 𝑇 > 1.5 > 1.5 → 𝑻 < 𝟎.𝟏𝟗𝟒𝒎𝒎
Now that we have a thickness of 0.194mm (7.6mil) from the above equation, we need to compare to the minimum area ratio:
𝐴𝑟𝑒𝑎 𝑅𝑎𝑡𝑖𝑜 = 𝐴𝑟𝑒𝑎 𝑜𝑓 𝑃𝑎𝑑 (𝐿∗𝑊) 𝐴𝑟𝑒𝑎 𝑜𝑓 𝑊𝑎𝑙𝑙𝑠 (2∗(𝐿+𝑊)∗𝑇) 𝐴𝑟𝑒𝑎 𝑅𝑎𝑡𝑖𝑜 = 0.085𝑚𝑚2 2∗0.582𝑚𝑚∗𝑇 > 0.66 > 0.66 → 𝑻 < 𝟎.𝟏𝟏𝟎𝒎𝒎
From the two equations above, the stencil thickness must be less than 0.194mm (7.6mil) to not violate the aspect ratio, and less than 0.110mm (4.3mil) to not violate the area ratio. Therefore, the stencil must be less than 4.3mil thick for the final design.

Paste Type

In addition to stencil thickness, the correct paste type should be used for good stencil release. IPC guidelines recommend the “five‑ball rule” — the solder paste ball size should allow for five solder balls to fit in the minimum aperture window.

Type Less than 0.5% larger than 10% Max. between 80% Min. between 10% Max. less than
1 160 150–160 75–150 75
2 80 75–80 45–75 45
3 60 45–60 25–45 25
4 50 38–50 20–38 20
5 40 25–40 15–25 15
6 25 15–25 5–15 5
7 15 11–15 2–11 2

Figure 3 – Solder Paste Size by Type (microns)

Using our example RF pin launch, the minimum aperture size is 0.291mm:

291𝑢𝑚 5 𝑠𝑜𝑙𝑑𝑒𝑟 𝑏𝑎𝑙𝑙𝑠 = 58𝑢𝑚
Using the five‑ball rule from the equation above, Type 4 paste meets the 58µm maximum ball size for the 0.5% case. Using the worst‑case value from the 0.5% column ensures maximum repeatability of the paste release during high‑volume production.

Reflow Profiles

PolyStrata SMT components are compatible with standard leaded and non‑leaded reflow profiles. The choice of reflow profile should be dictated by the recommended reflow from the solder paste vendor. An example generic profile provided by Kester for their leaded and lead‑free solder pastes is shown below:

Figure 4 — Reflow Profiles from Kester
Figure 4 — Reflow Profiles from Kester
Always follow recommended profiles for proper wetting of the PolyStrata RF launches during assembly.

Pick and Place

All PolyStrata SMT components are compatible with standard pick and place assembly processes. It’s recommended to follow these precautions for proper placement:

  1. Keep fiducial references close to the PolyStrata component. The accuracy of the pick and place head is affected by distance traversed from the fiducial reference. Placing a fiducial reference close to the component minimizes this error.
  2. Reduce head speed during placement. With high head speeds, parts can slide along the vacuum head due to abrupt changes in speed as the head starts and stops — creating a translation error between the pickup and place point on the PCB. Reducing head speed reduces these errors.
  3. Use copper alignment features instead of silkscreen. Solder mask and copper alignment are generally much more accurate than silkscreen, so it can be beneficial to use copper alignment features on the board for optical inspection:
    Figure 5 — Copper Alignment PCB Feature
    Figure 5 — Copper Alignment PCB Feature
  4. Use the proper pickup location and size for the component, as outlined in the interface control drawing:
    Figure 6 — Vacuum Pickup Area
    Figure 6 — Vacuum Pickup Area

Footprint

Part footprints are available in DXF and native Altium Designer formats on request — reach out to your Nuvotronics representative to receive these files. Alternatively, a footprint can be made from the mechanical model of the PolyStrata part. Follow the layer expansion guidelines below when creating a footprint for PolyStrata components:

Figure 7 — Footprint Expansion Values
Figure 7 — Footprint Expansion Values

Examples

Figure 8 — Good Solder Example
Figure 8 — Good Solder Example

 

Figure 9 — Alignment Error
Figure 9 — Alignment Error

 

Figure 10 - Too much solder paste, wicking up center conductor
Please contact us with any specific questions — we’ll help guide you toward an effective way to incorporate these devices into your production process.